\doxysubsubsubsection{RCCEx I2\+C3 Clock Source }
\hypertarget{group___r_c_c_ex___i2_c3___clock___source}{}\label{group___r_c_c_ex___i2_c3___clock___source}\index{RCCEx I2C3 Clock Source@{RCCEx I2C3 Clock Source}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
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\Hypertarget{group___r_c_c_ex___i2_c3___clock___source_gac4ef07105300e4cd0abe19ec4779247b}\label{group___r_c_c_ex___i2_c3___clock___source_gac4ef07105300e4cd0abe19ec4779247b} 
\#define {\bfseries RCC\+\_\+\+I2\+C3\+CLKSOURCE\+\_\+\+D2\+PCLK1}~RCC\+\_\+\+I2\+C123\+CLKSOURCE\+\_\+\+D2\+PCLK1
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\Hypertarget{group___r_c_c_ex___i2_c3___clock___source_ga35d5737ea01bba391e4b786447b4f24f}\label{group___r_c_c_ex___i2_c3___clock___source_ga35d5737ea01bba391e4b786447b4f24f} 
\#define {\bfseries RCC\+\_\+\+I2\+C3\+CLKSOURCE\+\_\+\+PLL3}~RCC\+\_\+\+I2\+C123\+CLKSOURCE\+\_\+\+PLL3
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\Hypertarget{group___r_c_c_ex___i2_c3___clock___source_ga15d4072c90a04b2393e49f05dc3c8fd2}\label{group___r_c_c_ex___i2_c3___clock___source_ga15d4072c90a04b2393e49f05dc3c8fd2} 
\#define {\bfseries RCC\+\_\+\+I2\+C3\+CLKSOURCE\+\_\+\+HSI}~RCC\+\_\+\+I2\+C123\+CLKSOURCE\+\_\+\+HSI
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\Hypertarget{group___r_c_c_ex___i2_c3___clock___source_ga9634b207d23e47dfc64ba9f1ab2d3320}\label{group___r_c_c_ex___i2_c3___clock___source_ga9634b207d23e47dfc64ba9f1ab2d3320} 
\#define {\bfseries RCC\+\_\+\+I2\+C3\+CLKSOURCE\+\_\+\+CSI}~RCC\+\_\+\+I2\+C123\+CLKSOURCE\+\_\+\+CSI
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\doxysubsubsubsubsection{Detailed Description}
